Low-density parity check (LDPC) code can achieve performance close to Shannon bound. Therefore, LDPC has been adopted by many state-of-the-art communication systems. It is a kind of binary linear block code whose parity check matrix is sparse which has much fewer 1s than a commonly used one. A sparse parity check matrix facilitates simple decoding algorithms and low-complexity decoder designs. Check matrix of a LDPC code is often represented by a bipartite graph, called Tanner graph, which is composed of n bit nodes (realized by Bit Node Units, BNU) and m check nodes (realized by Check Nodes Unit, CNUs). Those bit nodes and check nodes are connected by edges defined by the nonzero entries of the parity check matrix H. The number of “1” in each column of H determines the number of edges for each bit node connected to check nodes, and the number of “1” in each row of H determines the connections from each check node to bit nodes. Tanner graph shows a clear picture of all the information of exchange links in a decoding process. Although LDPC code has excellent decoding performance, its high computation complexity makes the area costs of LDPC decoders much larger than other ECC decoders. Besides, as the code length of adopted LDPC code increases, the area of Barrier Synchronization Register (BSR) array occupied in the whole LDPC decoder will significantly raise.
LDPC codes have advantages of better block error performance and parallelizable decoding processes over Turbo codes. Hence, it can potentially achieve significantly greater speeds and higher throughputs than Turbo codes. Parallelizable decoding processes can make LDPC code be decoded in a short time. LDPC code is a kind of binary linear block code which means it has to wait to receive the whole codeword before the LDPC code decoding processes begin. Due to the reasons mentioned above, the longer LDPC codeword is, the longer time it has to spend to receive the whole codeword. Thus, the decoding latency would be increased. There is not suitable prior art discussing solutions for this issue.
Therefore, the present invention provides an efficient method that can modify the LLR of bit nodes before the whole LDPC codeword is received to let the decoding iteration of LDPC code decreased, further achieving the goal of shorten the decoding latency.